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最近在編譯遠(yuǎn)古代碼的時候發(fā)現(xiàn)約束文件里面有這樣幾句


set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]
set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
set_property BITSTREAM.ENCRYPTION.KEYFILE E:\zsl\prj\c006_415t.nky [current_design]
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查了一下資料，原來是部分FPGA在出廠時有加密的專用設(shè)計(jì)，在生成bit文件的時候指定此加密文件，然后在下載到FPGA之前先用工具將此xxx.nky文件下載到FPGA中去，然后再下載bit文件時FPGA才能正確解析此bit文件，但是對于硬件沒有做此設(shè)置的FPGA來說，下載任何版本的bit文件都不受影響，此xxx.nky文件可以是自己寫的一串加密規(guī)則(?不知道什么內(nèi)容)，也可以是vivado按其規(guī)則自己生成的一個文件。


Several ZTEX FPGA Boards support Bitstream encryption, e.g. USB-FPGA Modules 2.16, 2.13, 2.14 and 2.18.


The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default.


Using encrypted bitstreams is quite simple:


1、Generate an encrypted bitstream either (ISE) using the bitgen option -g Encypt:Yes and -g KeyFile:<.nky file> or (Vivado) using the constraints


set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]
set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]
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If no key file (.nky file) is given a new one with random key is created.


2、Upload the key (.nky file) to the FPGA through JTAG using Xilinx tools
3、FPGA now accepts the encrypted bitstream (no special load technique is required but some options like bitstream compression may not work)


https://www.xilinx.com/support/answers/52881.html
AR# 52881
Configuration - BitStream Encryption - How to create and program an encrypted bitstream


https://www.xilinx.com/support/answers/61258.html
AR# 61258
Vivado 2014.x - Regenerate different key file for Encryption on Linux
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作者：weixin_39055614 
來源：CSDN 
原文：https://blog.csdn.net/weixin_39055614/article/details/88852785 
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